Conference paper

Publication year: 2017

Journal: Journal of Instrumentation

Volume number: 12

ISSN: 1748-0221

DOI Link: https://doi.org/10.1088/1748-0221/12/03/C03063

Conference: Topical Workshop on Electronics for Particle Physics

Publisher: IOP Publishing

Abstract: 
PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.

Harvard Citation style: Quagli, T., Brinkmann, K., Calvo, D., Di Pietro, V., Lai, A., Riccardi, A., et al. (2017) First results of the front-end ASIC for the strip detector of the PANDA MVD, Journal of Instrumentation, 12, Article C03063. https://doi.org/10.1088/1748-0221/12/03/C03063

APA Citation style: Quagli, T., Brinkmann, K., Calvo, D., Di Pietro, V., Lai, A., Riccardi, A., Ritman, J., Rivetti, A., Rolo, M., Stockmanns, T., Wheadon, R., & Zambanini, A. (2017). First results of the front-end ASIC for the strip detector of the PANDA MVD. Journal of Instrumentation. 12, Article C03063. https://doi.org/10.1088/1748-0221/12/03/C03063